Design Of D-Flip Flop Using Verilog

  1. What is the relationship of input and output in T-FLip Flop?

  2. What will be the output of a 4-bit down counter?

  3. What is the difference between T-flip flop and D-flip flop?

  4. What is the difference between asynchronous and synchronous counter?

  5. Explain what do you mean by positive edge reset or negative edge clear?